BOSS 7.0.2
BESIII Offline Software System
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RootTofQElecDataCnv.cxx
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1#include "GaudiKernel/MsgStream.h"
2#include "RootTofQElecDataCnv.h"
3#include "CalibData/Tof/TofElecData.h"
4#include "CalibDataSvc/IInstrumentName.h"
5#include "TFile.h"
6#include "TTree.h"
7#include "TDirectory.h"
8#include "TObject.h"
9#include "TBuffer.h"
10
11#include "GaudiKernel/CnvFactory.h"
12#include "GaudiKernel/IOpaqueAddress.h"
13#include "GaudiKernel/DataObject.h"
14#include "GaudiKernel/IAddressCreator.h"
15#include "GaudiKernel/IDataProviderSvc.h"
16#include "GaudiKernel/IConversionSvc.h"
17#include "GaudiKernel/GenericAddress.h"
18
19#include "CalibDataSvc/ICalibTreeSvc.h" //maybe
20#include "CalibDataSvc/ICalibMetaCnvSvc.h"
21
22// Temporary. Hope to find a better way to do this
23#include "CalibData/CalibModel.h"
24using namespace CalibData;
25//static CnvFactory<RootTofElecDataCnv> TofCal_factory;
26//const ICnvFactory& RootTofElecDataCnvFactory = TofCal_factory;
27
28
29
30RootTofElecDataCnv::RootTofElecDataCnv( ISvcLocator* svc) :
31 RootCalBaseCnv(svc, CLID_TofQ_Elec) {
32
33}
34
35
36const CLID& RootTofElecDataCnv::objType() const {
37 return CLID_TofQ_Elec;
38}
39
40const CLID& RootTofElecDataCnv::classID() {
41 return CLID_TofQ_Elec;
42}
43
44StatusCode RootTofElecDataCnv::i_createObj(const std::string& fname,
45 DataObject*& refpObject) {
46
47 MsgStream log(msgSvc(), "RootTofElecDataCnv");
48 log<<MSG::DEBUG<<"SetProperty"<<endreq;
49 StatusCode sc = openRead(fname);
50 if(!sc)
51 { log<<MSG::ERROR<<"unable to open files"<<endreq;
52 }
53
54 TTree *BarBoardNum=(TTree*)m_inFile -> Get("BarBoardNum");
55 TTree *EndBoardNum= (TTree*)m_inFile -> Get("EndBoardNum");
56 TTree *QElecBarParEast = (TTree*)m_inFile -> Get("QElecBarParEast");
57 TTree *QElecBarParWest = (TTree*)m_inFile -> Get("QElecBarParWest");
58 TTree *QElecEndPar = (TTree*)m_inFile -> Get("QElecEndPar");
59 TTree *SimQElecBarParEast = (TTree*)m_inFile -> Get("SimQElecBarParEast");
60 TTree *SimQElecBarParWest = (TTree*)m_inFile -> Get("SimQElecBarParWest");
61 TTree *SimQElecEndPar = (TTree*)m_inFile -> Get("SimQElecEndPar");
62
63 CalibData::BarrelElec bTof;
64 CalibData::EndcapElec eTof;
65
66 std::vector<CalibData::BarrelElec> tmpbTof;//; = new vector<CalibData::bTofCalibBase>;
67 std::vector<CalibData::EndcapElec> tmpeTof;
68
69 // Read in the object
70 int cnt;
71 // read btoftree ------------------------------------------------------------
72 unsigned int num[4];
73 double num1[4];
74 BarBoardNum -> SetBranchAddress("Board", &num1[0]);
75 BarBoardNum -> SetBranchAddress("Channel", &num1[1]);
76 BarBoardNum -> SetBranchAddress("Crate", &num1[2]);
77 BarBoardNum -> SetBranchAddress("Fee", &num1[3]);
78 double p[11];
79 QElecBarParEast->SetBranchAddress("P0",&p[0]);
80 QElecBarParEast->SetBranchAddress("P1",&p[1]);
81 QElecBarParEast->SetBranchAddress("P2",&p[2]);
82 QElecBarParEast->SetBranchAddress("P3",&p[3]);
83 QElecBarParEast->SetBranchAddress("P4",&p[4]);
84 QElecBarParEast->SetBranchAddress("P5",&p[5]);
85 QElecBarParEast->SetBranchAddress("P6",&p[6]);
86 QElecBarParEast->SetBranchAddress("P7",&p[7]);
87 QElecBarParEast->SetBranchAddress("P8",&p[8]);
88 QElecBarParEast->SetBranchAddress("P9",&p[9]);
89 QElecBarParEast->SetBranchAddress("P10",&p[10]);
90 double p_w[11];
91 QElecBarParWest->SetBranchAddress("P0",&p_w[0]);
92 QElecBarParWest->SetBranchAddress("P1",&p_w[1]);
93 QElecBarParWest->SetBranchAddress("P2",&p_w[2]);
94 QElecBarParWest->SetBranchAddress("P3",&p_w[3]);
95 QElecBarParWest->SetBranchAddress("P4",&p_w[4]);
96 QElecBarParWest->SetBranchAddress("P5",&p_w[5]);
97 QElecBarParWest->SetBranchAddress("P6",&p_w[6]);
98 QElecBarParWest->SetBranchAddress("P7",&p_w[7]);
99 QElecBarParWest->SetBranchAddress("P8",&p_w[8]);
100 QElecBarParWest->SetBranchAddress("P9",&p_w[9]);
101 QElecBarParWest->SetBranchAddress("P10",&p_w[10]);
102 double p_se[11];
103 SimQElecBarParEast->SetBranchAddress("P0",&p_se[0]);
104 SimQElecBarParEast->SetBranchAddress("P1",&p_se[1]);
105 SimQElecBarParEast->SetBranchAddress("P2",&p_se[2]);
106 SimQElecBarParEast->SetBranchAddress("P3",&p_se[3]);
107 SimQElecBarParEast->SetBranchAddress("P4",&p_se[4]);
108 SimQElecBarParEast->SetBranchAddress("P5",&p_se[5]);
109 SimQElecBarParEast->SetBranchAddress("P6",&p_se[6]);
110 SimQElecBarParEast->SetBranchAddress("P7",&p_se[7]);
111 SimQElecBarParEast->SetBranchAddress("P8",&p_se[8]);
112 SimQElecBarParEast->SetBranchAddress("P9",&p_se[9]);
113 SimQElecBarParEast->SetBranchAddress("P10",&p_se[10]);
114 double p_sw[11];
115 SimQElecBarParWest->SetBranchAddress("P0",&p_sw[0]);
116 SimQElecBarParWest->SetBranchAddress("P1",&p_sw[1]);
117 SimQElecBarParWest->SetBranchAddress("P2",&p_sw[2]);
118 SimQElecBarParWest->SetBranchAddress("P3",&p_sw[3]);
119 SimQElecBarParWest->SetBranchAddress("P4",&p_sw[4]);
120 SimQElecBarParWest->SetBranchAddress("P5",&p_sw[5]);
121 SimQElecBarParWest->SetBranchAddress("P6",&p_sw[6]);
122 SimQElecBarParWest->SetBranchAddress("P7",&p_sw[7]);
123 SimQElecBarParWest->SetBranchAddress("P8",&p_sw[8]);
124 SimQElecBarParWest->SetBranchAddress("P9",&p_sw[9]);
125 SimQElecBarParWest->SetBranchAddress("P10",&p_sw[10]);
126
127 for(cnt=0; cnt<352; cnt++){
128 BarBoardNum -> GetEntry(cnt);
129 num[0]=num1[0];
130 num[1]=num1[1];
131 num[2]=num1[2];
132 num[3]=num1[3];
133 if(cnt%2!=0){
134 bTof.setNumWest(num);
135 }
136 if(cnt%2==0){
137 bTof.setNumEast(num);
138 int kkk=cnt/2;
139 QElecBarParEast->GetEntry(kkk);
140 QElecBarParWest->GetEntry(kkk);
141 SimQElecBarParEast->GetEntry(kkk);
142 SimQElecBarParWest->GetEntry(kkk);
143 bTof.setP1(p);
144 bTof.setP2(p_w);
145 bTof.setSimP1(p_se);
146 bTof.setSimP2(p_sw);
147 }
148 if(cnt%2!=0)
149 tmpbTof.push_back(bTof);
150 }
151
152 //read etoftree
153 EndBoardNum -> SetBranchAddress("Board", &num1[0]);
154 EndBoardNum -> SetBranchAddress("Channel", &num1[1]);
155 EndBoardNum -> SetBranchAddress("Crate", &num1[2]);
156 EndBoardNum -> SetBranchAddress("Fee", &num1[3]);
157 QElecEndPar-> SetBranchAddress("P0",&p[0]);
158 QElecEndPar->SetBranchAddress("P1",&p[1]);
159 QElecEndPar->SetBranchAddress("P2",&p[2]);
160 QElecEndPar->SetBranchAddress("P3",&p[3]);
161 QElecEndPar->SetBranchAddress("P4",&p[4]);
162 QElecEndPar->SetBranchAddress("P5",&p[5]);
163 QElecEndPar->SetBranchAddress("P6",&p[6]);
164 QElecEndPar->SetBranchAddress("P7",&p[7]);
165 QElecEndPar->SetBranchAddress("P8",&p[8]);
166 QElecEndPar->SetBranchAddress("P9",&p[9]);
167 QElecEndPar->SetBranchAddress("P10",&p[10]);
168 SimQElecEndPar-> SetBranchAddress("P0",&p_w[0]);
169 SimQElecEndPar->SetBranchAddress("P1",&p_w[1]);
170 SimQElecEndPar->SetBranchAddress("P2",&p_w[2]);
171 SimQElecEndPar->SetBranchAddress("P3",&p_w[3]);
172 SimQElecEndPar->SetBranchAddress("P4",&p_w[4]);
173 SimQElecEndPar->SetBranchAddress("P5",&p_w[5]);
174 SimQElecEndPar->SetBranchAddress("P6",&p_w[6]);
175 SimQElecEndPar->SetBranchAddress("P7",&p_w[7]);
176 SimQElecEndPar->SetBranchAddress("P8",&p_w[8]);
177 SimQElecEndPar->SetBranchAddress("P9",&p_w[9]);
178 SimQElecEndPar->SetBranchAddress("P10",&p_w[10]);
179 for(cnt=0; cnt<96; cnt++){
180 EndBoardNum->GetEntry(cnt);
181 QElecEndPar->GetEntry(cnt);
182 SimQElecEndPar->GetEntry(cnt);
183 num[0]=num1[0];
184 num[1]=num1[1];
185 num[2]=num1[2];
186 num[3]=num1[3];
187 eTof.setNum(num);
188 eTof.setP(p);
189 eTof.setSimP(p_w);
190 tmpeTof.push_back(eTof);
191 }
192
193 CalibData::TofElecData *tmpObject = new CalibData::TofElecData(&tmpbTof,&tmpeTof);
194
195
196 refpObject=tmpObject;
197 delete BarBoardNum;
198 delete EndBoardNum;
199 delete QElecBarParEast;
200 delete QElecBarParWest;
201 delete QElecEndPar;
202 delete SimQElecBarParEast;
203 delete SimQElecBarParWest;
204 delete SimQElecEndPar;
205
206 return StatusCode::SUCCESS;
207
208
209}
210
SetBranchAddress
data SetBranchAddress("time",&time)
GetEntry
data GetEntry(0)
RootCalBaseCnv::openRead
StatusCode openRead(const std::string &fname)
Definition: RootCalBaseCnv.cxx:98
RootTofElecDataCnv::objType
const CLID & objType() const
Definition: RootTofQElecDataCnv.cxx:36
RootTofElecDataCnv::i_createObj
virtual StatusCode i_createObj(const std::string &fname, DataObject *&refpObject)
Definition: RootTofQElecDataCnv.cxx:44
RootTofElecDataCnv::RootTofElecDataCnv
RootTofElecDataCnv(ISvcLocator *svc)
Definition: RootTofQElecDataCnv.cxx:30
RootTofElecDataCnv::classID
static const CLID & classID()
Definition: RootTofQElecDataCnv.cxx:40