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◆ ranlxd()
void ranlxd |
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double | r[], |
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int | n ) |
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extern |
◆ rlxd_get()
void rlxd_get |
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int | state[] | ) |
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extern |
Definition at line 605 of file BesEvtGen/BesEvtGen-00-04-30/src/phokhara/PHOKHARA/ranlxd.c.
606{
607 int k;
608
609 if (init==0)
610 error(3);
611
613
614 for (k=0;k<96;k++)
615 state[k+1]=x.num[k];
616
617 state[97]=carry.c1;
618 state[98]=carry.c2;
619 state[99]=carry.c3;
620 state[100]=carry.c4;
621
622 state[101]=pr;
623 state[102]=ir;
624 state[103]=jr;
625 state[104]=is;
626}
◆ rlxd_init()
void rlxd_init |
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int | level, |
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int | seed ) |
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extern |
Definition at line 503 of file BesEvtGen/BesEvtGen-00-04-30/src/phokhara/PHOKHARA/ranlxd.c.
504{
505 int i,k,l;
506 int ibit,jbit,xbit[31];
508
509 if ((INT_MAX<2147483647)||(FLT_RADIX!=2)||(FLT_MANT_DIG<24)||
510 (DBL_MANT_DIG<48))
511 error(0);
512
513 define_constants();
514
515 if (level==1)
516 pr=202;
517 else if (level==2)
518 pr=397;
519 else
520 error(1);
521
522 i=seed;
523
524 for (k=0;k<31;k++)
525 {
526 xbit[k]=i%2;
527 i/=2;
528 }
529
530 if ((seed<=0)||(i!=0))
531 error(2);
532
533 ibit=0;
534 jbit=18;
535
536 for (i=0;i<4;i++)
537 {
538 for (k=0;k<24;k++)
539 {
541
542 for (l=0;l<24;l++)
543 {
544 iy=xbit[ibit];
546
547 xbit[ibit]=(xbit[ibit]+xbit[jbit])%2;
548 ibit=(ibit+1)%31;
549 jbit=(jbit+1)%31;
550 }
551
552 if ((k%4)!=i)
554
556 }
557 }
558
559 carry.c1=0;
560 carry.c2=0;
561 carry.c3=0;
562 carry.c4=0;
563
564 ir=0;
565 jr=7;
566 is=91;
567 is_old=0;
568 prm=pr%12;
569 init=1;
570}
◆ rlxd_reset()
void rlxd_reset |
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int | state[] | ) |
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extern |
Definition at line 629 of file BesEvtGen/BesEvtGen-00-04-30/src/phokhara/PHOKHARA/ranlxd.c.
630{
631 int k;
632
633 if ((INT_MAX<2147483647)||(FLT_RADIX!=2)||(FLT_MANT_DIG<24)||
634 (DBL_MANT_DIG<48))
635 error(4);
636
637 define_constants();
638
640 error(5);
641
642 for (k=0;k<96;k++)
643 {
644 if ((state[k+1]<0)||(state[k+1]>=167777216))
645 error(5);
646
647 x.num[k]=state[k+1];
648 }
649
650 if (((state[97]!=0)&&(state[97]!=1))||
651 ((state[98]!=0)&&(state[98]!=1))||
652 ((state[99]!=0)&&(state[99]!=1))||
653 ((state[100]!=0)&&(state[100]!=1)))
654 error(5);
655
656 carry.c1=state[97];
657 carry.c2=state[98];
658 carry.c3=state[99];
659 carry.c4=state[100];
660
661 pr=state[101];
662 ir=state[102];
663 jr=state[103];
664 is=state[104];
665 is_old=8*ir;
666 prm=pr%12;
667 init=1;
668
669 if (((pr!=202)&&(pr!=397))||
670 (ir<0)||(ir>11)||(jr<0)||(jr>11)||(jr!=((ir+7)%12))||
671 (is<0)||(is>91))
672 error(5);
673}
◆ rlxd_size()